Builder mac Build 4490
Results:
Internal Failure
Trigger Info:
Project | wasm |
Revision | a0e03553f9741f425616304ae9e2221a80df9974 |
Execution:
- Source: Task 42f85f7fc3e7c910
- Recipe: wasm_llvm
Build Properties:
Name | Value | Source |
---|
Blamelist:
- Shoaib Meenai (smeenaiohnoyoudont@fb.com)
- Petr Hosek (phosekohnoyoudont@chromium.org)
- Sanjay Patel (spatelohnoyoudont@rotateright.com)
- Sanjay Patel (spatelohnoyoudont@rotateright.com)
- David Blaikie (dblaikieohnoyoudont@gmail.com)
- Eli Friedman (efriedmaohnoyoudont@quicinc.com)
- Philip Reames (listmailohnoyoudont@philipreames.com)
- Philip Reames (listmailohnoyoudont@philipreames.com)
- David Blaikie (dblaikieohnoyoudont@gmail.com)
- Philip Reames (listmailohnoyoudont@philipreames.com)
- Philip Reames (listmailohnoyoudont@philipreames.com)
- Daniel Sanders (daniel_l_sandersohnoyoudont@apple.com)
- Matt Arsenault (Matthew.Arsenaultohnoyoudont@amd.com)
- Evandro Menezes (e.menezesohnoyoudont@samsung.com)
- Ana Pazos (apazosohnoyoudont@quicinc.com)
- Scott Linder (scottohnoyoudont@scottlinder.com)
- Matt Arsenault (Matthew.Arsenaultohnoyoudont@amd.com)
- Matt Arsenault (Matthew.Arsenaultohnoyoudont@amd.com)
- Daniel Sanders (daniel_l_sandersohnoyoudont@apple.com)
- Craig Topper (craig.topperohnoyoudont@intel.com)
- Matt Davis (Matthew.Davisohnoyoudont@sony.com)
- Daniel Sanders (daniel_l_sandersohnoyoudont@apple.com)
- Alina Sbirlea (asbirleaohnoyoudont@google.com)
- Michael Kruse (llvmohnoyoudont@meinersbur.de)
- Sanjay Patel (spatelohnoyoudont@rotateright.com)
- Bjorn Pettersson (bjorn.a.petterssonohnoyoudont@ericsson.com)
- Alina Sbirlea (asbirleaohnoyoudont@google.com)
- Evandro Menezes (e.menezesohnoyoudont@samsung.com)
- Jessica Paquette (jpaquetteohnoyoudont@apple.com)
- Jessica Paquette (jpaquetteohnoyoudont@apple.com)
- Jordan Rupprecht (rupprechtohnoyoudont@google.com)
- Andrea Di Biagio (Andrea_DiBiagioohnoyoudont@sn.scee.net)
- Roland Froese (froeseohnoyoudont@ca.ibm.com)
- Jessica Paquette (jpaquetteohnoyoudont@apple.com)
- Jessica Paquette (jpaquetteohnoyoudont@apple.com)
- Matt Arsenault (Matthew.Arsenaultohnoyoudont@amd.com)
- Valery Pykhtin (Valery.Pykhtinohnoyoudont@amd.com)
- Simon Pilgrim (llvm-devohnoyoudont@redking.me.uk)
- David Greene (greenedohnoyoudont@obbligato.org)
- Benjamin Kramer (benny.kraohnoyoudont@googlemail.com)
- Andrea Di Biagio (Andrea_DiBiagioohnoyoudont@sn.scee.net)
- Benjamin Kramer (benny.kraohnoyoudont@googlemail.com)
- Neil Henning (neil.henningohnoyoudont@amd.com)
- Sam McCall (sam.mccallohnoyoudont@gmail.com)
Timing:
Create | Tuesday, 12-Feb-19 02:34:09 UTC |
Start | N/A |
End | Tuesday, 12-Feb-19 08:35:01 UTC |
Pending | 6 hrs |
Execution | N/A |
All Changes:
-
[build] Remove a stray comment. NFC
Changed by Shoaib Meenai - smeenaiohnoyoudont@fb.com Changed at Tuesday, 12-Feb-19 02:25:27 UTC Repository https://llvm.googlesource.com/llvm Branch Revision a0e03553f9741f425616304ae9e2221a80df9974 Comments
[build] Remove a stray comment. NFC The CMake change associated with this comment was removed but the comment got left behind. Add a newline instead. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353793 91177308-0d34-0410-b5e6-96231b3b80d8
Changed files
- runtimes/CMakeLists.txt
-
[CMake] Don't override required compiler flags in the runtimes build
Changed by Petr Hosek - phosekohnoyoudont@chromium.org Changed at Tuesday, 12-Feb-19 02:11:25 UTC Repository https://llvm.googlesource.com/llvm Branch Revision 0f056ecd63f49cd3ef08299b3372db3dd9091483 Comments
[CMake] Don't override required compiler flags in the runtimes build Ensure that HandleLLVMOptions adds all necessary required flags, including -Wno-error when building with LLVM_ENABLE_WERROR enabled. Differential Revision: https://reviews.llvm.org/D58092 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353790 91177308-0d34-0410-b5e6-96231b3b80d8
Changed files
- runtimes/CMakeLists.txt
-
[x86] add tests for logic of setcc (PR40611); NFC
Changed by Sanjay Patel - spatelohnoyoudont@rotateright.com Changed at Tuesday, 12-Feb-19 01:46:30 UTC Repository https://llvm.googlesource.com/llvm Branch Revision 57909365e7d48ce2be07102138e5cfe0747e86b4 Comments
[x86] add tests for logic of setcc (PR40611); NFC git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353789 91177308-0d34-0410-b5e6-96231b3b80d8
Changed files
- test/CodeGen/X86/setcc-logic.ll
-
[PowerPC] add tests for logic of setcc (PR40611); NFC
Changed by Sanjay Patel - spatelohnoyoudont@rotateright.com Changed at Tuesday, 12-Feb-19 01:46:26 UTC Repository https://llvm.googlesource.com/llvm Branch Revision b6428b8bf9c11daccf874bdfc6e362ff1b57b3d0 Comments
[PowerPC] add tests for logic of setcc (PR40611); NFC git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353788 91177308-0d34-0410-b5e6-96231b3b80d8
Changed files
- test/CodeGen/PowerPC/setcc-logic.ll
-
Fix r353771 to target linux only (split-dwarf isn't supported on macho)
Changed by David Blaikie - dblaikieohnoyoudont@gmail.com Changed at Tuesday, 12-Feb-19 01:19:00 UTC Repository https://llvm.googlesource.com/llvm Branch Revision d4b7ab5a37716f4056b8bdafd7e0a8e9fbfe3506 Comments
Fix r353771 to target linux only (split-dwarf isn't supported on macho) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353785 91177308-0d34-0410-b5e6-96231b3b80d8
Changed files
- test/DebugInfo/X86/gmlt-no-split-dwarf-inlining-empty.ll
-
[LoopReroll] Fix reroll root legality checking.
Changed by Eli Friedman - efriedmaohnoyoudont@quicinc.com Changed at Tuesday, 12-Feb-19 00:33:25 UTC Repository https://llvm.googlesource.com/llvm Branch Revision 7dd25617402280e474247afdf16e117b35d98681 Comments
[LoopReroll] Fix reroll root legality checking. The code checked that the first root was an appropriate distance from the base value, but skipped checking the other roots. This could lead to rerolling a loop that can't be legally rerolled (at least, not without rewriting the loop in a non-trivial way). Differential Revision: https://reviews.llvm.org/D56812 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353779 91177308-0d34-0410-b5e6-96231b3b80d8
Changed files
- lib/Transforms/Scalar/LoopRerollPass.cpp
- test/Transforms/LoopReroll/basic.ll
-
[Test] Use autogenerated checks for more statepoint tests
Changed by Philip Reames - listmailohnoyoudont@philipreames.com Changed at Tuesday, 12-Feb-19 00:12:46 UTC Repository https://llvm.googlesource.com/llvm Branch Revision 6f6c9d03984579bea6a24ec3ad0537abedacf195 Comments
[Test] Use autogenerated checks for more statepoint tests git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353776 91177308-0d34-0410-b5e6-96231b3b80d8
Changed files
- test/CodeGen/X86/statepoint-allocas.ll
- test/CodeGen/X86/statepoint-call-lowering.ll
- test/CodeGen/X86/statepoint-far-call.ll
- test/CodeGen/X86/statepoint-invoke.ll
-
[Tests] Fill out a few tests around gc relocation uniquing
Changed by Philip Reames - listmailohnoyoudont@philipreames.com Changed at Tuesday, 12-Feb-19 00:01:39 UTC Repository https://llvm.googlesource.com/llvm Branch Revision c888abcfc1135c11e423eb9737cd8a0368d9a81b Comments
[Tests] Fill out a few tests around gc relocation uniquing git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353773 91177308-0d34-0410-b5e6-96231b3b80d8
Changed files
- test/CodeGen/X86/statepoint-uniqueing.ll
-
DebugInfo: Split DWARF + gmlt + no-split-dwarf-inlining shouldn't emit anything to the .dwo file
Changed by David Blaikie - dblaikieohnoyoudont@gmail.com Changed at Tuesday, 12-Feb-19 00:00:38 UTC Repository https://llvm.googlesource.com/llvm Branch Revision 49124bf7453a000cad0c3f34a0a51165b0c002e6 Comments
DebugInfo: Split DWARF + gmlt + no-split-dwarf-inlining shouldn't emit anything to the .dwo file This configuration (due to r349207) was intended not to emit any DWO CU, but a degenerate CU was still being emitted - containing a header and a DW_TAG_compile_unit with no attributes. Under that situation, emit nothing to the .dwo file. (since this is a dynamic property of the input the .dwo file is still emitted, just with nothing in it (so a valid, but empty, ELF file) - if some other CU didn't satisfy this criteria, its DWO CU would still go there, etc) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353771 91177308-0d34-0410-b5e6-96231b3b80d8
Changed files
- lib/CodeGen/AsmPrinter/DwarfDebug.cpp
- lib/CodeGen/AsmPrinter/DwarfFile.cpp
- test/DebugInfo/X86/gmlt-no-split-dwarf-inlining-empty.ll
-
[Test] Autogenerate a statepoint test and actual show the reload
Changed by Philip Reames - listmailohnoyoudont@philipreames.com Changed at Monday, 11-Feb-19 23:55:24 UTC Repository https://llvm.googlesource.com/llvm Branch Revision fa1c1f7304a203be965f16fe8ba6d74d0ae46bf4 Comments
[Test] Autogenerate a statepoint test and actual show the reload git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353770 91177308-0d34-0410-b5e6-96231b3b80d8
Changed files
- test/CodeGen/X86/statepoint-uniqueing.ll
-
Be conservative about unordered accesses for the moment
Changed by Philip Reames - listmailohnoyoudont@philipreames.com Changed at Monday, 11-Feb-19 23:34:33 UTC Repository https://llvm.googlesource.com/llvm Branch Revision 5021270f7bd6f63839c8ea18f6177a1c0a3170dd Comments
Be conservative about unordered accesses for the moment Background: As described in https://reviews.llvm.org/D57601, I'm working towards separating volatile and atomic in the MMO uses for atomic instructions. In https://reviews.llvm.org/D57593, I fixed a bug where isUnordered was returning the wrong result, but didn't account for the fact I was getting slightly ahead of myself. While both uses of isUnordered are correct (as far as I can tell), we don't have tests to demonstrate this and being aggressive gets in the way of having the removal of volatile truly be non-functional. Once D57601 lands, I will return to these call sites, revert this patch, and add the appropriate tests to show the expected behaviour. Differential Revision: https://reviews.llvm.org/D57802 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353766 91177308-0d34-0410-b5e6-96231b3b80d8
Changed files
- lib/CodeGen/ImplicitNullChecks.cpp
- lib/CodeGen/MachineInstr.cpp
-
[tblgen] Add a timer covering the time spent reading the Instruction defs
Changed by Daniel Sanders - daniel_l_sandersohnoyoudont@apple.com Changed at Monday, 11-Feb-19 23:02:02 UTC Repository https://llvm.googlesource.com/llvm Branch Revision 01b9856485b5c7ed833d3c3000ccf2b894c71c98 Comments
[tblgen] Add a timer covering the time spent reading the Instruction defs This patch adds a -time-regions option to tablegen that can enable timers (currently only one) that assess the performance of tablegen itself. This can be useful for identifying scaling problems with tablegen backends. This particular timer has allowed me to ignore time that is not attributed the GISel combiner pass. It's useful by itself but it is particularly useful in combination with https://reviews.llvm.org/D52954 which causes this period of time to be annotated within Xcode Instruments which in turn allows profile samples and recorded allocations attributed to reading instructions to be filtered out. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353763 91177308-0d34-0410-b5e6-96231b3b80d8
Changed files
- include/llvm/TableGen/TableGenBackend.h
- utils/TableGen/CodeGenTarget.cpp
- utils/TableGen/TableGen.cpp
-
GlobalISel: Verify G_EXTRACT
Changed by Matt Arsenault - Matthew.Arsenaultohnoyoudont@amd.com Changed at Monday, 11-Feb-19 22:12:43 UTC Repository https://llvm.googlesource.com/llvm Branch Revision 45f5ca3e2d402f72fe29084929eaad4652a6362d Comments
GlobalISel: Verify G_EXTRACT git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353759 91177308-0d34-0410-b5e6-96231b3b80d8
Changed files
- lib/CodeGen/MachineVerifier.cpp
- test/CodeGen/AMDGPU/GlobalISel/legalize-extract.mir
- test/Verifier/test_g_extract.mir
-
[TargetLibraryInfo] Update run time support for Windows
Changed by Evandro Menezes - e.menezesohnoyoudont@samsung.com Changed at Monday, 11-Feb-19 22:12:01 UTC Repository https://llvm.googlesource.com/llvm Branch Revision 12946fbd9dbd3a1dd38c0e26b4263b94b3b0a523 Comments
[TargetLibraryInfo] Update run time support for Windows It seems that, since VC19, the `float` C99 math functions are supported for all targets, unlike the C89 ones. According to the discussion at https://reviews.llvm.org/D57625. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353758 91177308-0d34-0410-b5e6-96231b3b80d8
Changed files
- lib/Analysis/TargetLibraryInfo.cpp
- test/Transforms/InstCombine/double-float-shrink-1.ll
- test/Transforms/InstCombine/pow-1.ll
-
[LegalizeTypes] Expand FNEG to bitwise op for IEEE FP types
Changed by Ana Pazos - apazosohnoyoudont@quicinc.com Changed at Monday, 11-Feb-19 22:10:08 UTC Repository https://llvm.googlesource.com/llvm Branch Revision bc24c432c210ac5146f852bee0bebab8bcf3e221 Comments
[LegalizeTypes] Expand FNEG to bitwise op for IEEE FP types Summary: Except for custom floating point types x86_fp80 and ppc_fp128, expand Y = FNEG(X) to Y = X ^ sign mask to avoid library call. Using bitwise operation can improve code size and performance. Reviewers: efriedma Reviewed By: efriedma Subscribers: efriedma, kpn, arsenm, eli.friedman, javed.absar, rbar, johnrusso, simoncook, sabuasal, niosHD, zzheng, edward-jones, rogfer01, MartinMosbeck, brucehoult, the_o, PkmX, jocewei, asb, llvm-commits Differential Revision: https://reviews.llvm.org/D57875 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353757 91177308-0d34-0410-b5e6-96231b3b80d8
Changed files
- lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
- test/CodeGen/ARM/legalize-fneg.ll
- test/CodeGen/RISCV/legalize-fneg.ll
-
[IRReader] Expose getLazyIRModule
Changed by Scott Linder - scottohnoyoudont@scottlinder.com Changed at Monday, 11-Feb-19 22:01:13 UTC Repository https://llvm.googlesource.com/llvm Branch Revision 377fba3b5c710cde9d3c52fa06287f37841fc4ed Comments
[IRReader] Expose getLazyIRModule Currently there is no way to lazy-load an in-memory IR module without first writing it to disk. This patch just exposes the existing implementation of getLazyIRModule. This is effectively a revert of rL212364 Differential Revision: https://reviews.llvm.org/D56203 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353755 91177308-0d34-0410-b5e6-96231b3b80d8
Changed files
- include/llvm/IRReader/IRReader.h
- lib/IRReader/IRReader.cpp
-
GlobalISel: Implement moreElementsVector for implicit_def
Changed by Matt Arsenault - Matthew.Arsenaultohnoyoudont@amd.com Changed at Monday, 11-Feb-19 22:00:39 UTC Repository https://llvm.googlesource.com/llvm Branch Revision f3f4691605009a5714f69892ef4237bf37f49b52 Comments
GlobalISel: Implement moreElementsVector for implicit_def git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353754 91177308-0d34-0410-b5e6-96231b3b80d8
Changed files
- include/llvm/CodeGen/GlobalISel/LegalizerHelper.h
- lib/CodeGen/GlobalISel/LegalizerHelper.cpp
- lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
- test/CodeGen/AMDGPU/GlobalISel/legalize-and.mir
- test/CodeGen/AMDGPU/GlobalISel/legalize-ashr.mir
- test/CodeGen/AMDGPU/GlobalISel/legalize-extract.mir
- test/CodeGen/AMDGPU/GlobalISel/legalize-fabs.mir
- test/CodeGen/AMDGPU/GlobalISel/legalize-fadd.mir
- test/CodeGen/AMDGPU/GlobalISel/legalize-fcanonicalize.mir
- test/CodeGen/AMDGPU/GlobalISel/legalize-fma.mir
- test/CodeGen/AMDGPU/GlobalISel/legalize-fmul.mir
- test/CodeGen/AMDGPU/GlobalISel/legalize-fneg.mir
- test/CodeGen/AMDGPU/GlobalISel/legalize-fpext.mir
- test/CodeGen/AMDGPU/GlobalISel/legalize-fsqrt.mir
- test/CodeGen/AMDGPU/GlobalISel/legalize-fsub.mir
- test/CodeGen/AMDGPU/GlobalISel/legalize-implicit-def.mir
- test/CodeGen/AMDGPU/GlobalISel/legalize-lshr.mir
- test/CodeGen/AMDGPU/GlobalISel/legalize-or.mir
- test/CodeGen/AMDGPU/GlobalISel/legalize-shl.mir
- test/CodeGen/AMDGPU/GlobalISel/legalize-unmerge-values.mir
- test/CodeGen/AMDGPU/GlobalISel/legalize-xor.mir
-
GlobalISel: Fix not calling the observer when legalizing G_EXTRACT
Changed by Matt Arsenault - Matthew.Arsenaultohnoyoudont@amd.com Changed at Monday, 11-Feb-19 21:33:54 UTC Repository https://llvm.googlesource.com/llvm Branch Revision 3038811553351be0868a4e29351d3e74c0b49899 Comments
GlobalISel: Fix not calling the observer when legalizing G_EXTRACT git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353750 91177308-0d34-0410-b5e6-96231b3b80d8
Changed files
- lib/CodeGen/GlobalISel/LegalizerHelper.cpp
-
[globalisel] Correct string emitted by GISelChangeObserver::erasingInstr()
Changed by Daniel Sanders - daniel_l_sandersohnoyoudont@apple.com Changed at Monday, 11-Feb-19 20:45:19 UTC Repository https://llvm.googlesource.com/llvm Branch Revision 588dc9bffeb7d286ab6024f8429c31d48f1d0c38 Comments
[globalisel] Correct string emitted by GISelChangeObserver::erasingInstr() The API indicates that the MI is about to be erased rather than it has been erased. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353746 91177308-0d34-0410-b5e6-96231b3b80d8
Changed files
- lib/CodeGen/GlobalISel/Combiner.cpp
- test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-extending-loads-cornercases.mir
-
[X86] Correct the memory operand for the FLD emitted in FP_TO_INTHelper for 32-bit SSE targets.
Changed by Craig Topper - craig.topperohnoyoudont@intel.com Changed at Monday, 11-Feb-19 20:38:10 UTC Repository https://llvm.googlesource.com/llvm Branch Revision 55a63572d1d78dd844da0fd40c0d8ad442723618 Comments
[X86] Correct the memory operand for the FLD emitted in FP_TO_INTHelper for 32-bit SSE targets. We were using DstTy, but that represents the integer type we are converting to which is i64 in this case. The FLD is part of an intermediate step to get from the SSE registers to the x87 registers. If the floating point type is f32, the memory operand should reflect a 4 byte access not an 8 byte access. The store we used to get from SSE to the stack is using the corect size. While there, consistenly use TheVT in place of Op.getOperand(0).getValueType() throughout the function. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353745 91177308-0d34-0410-b5e6-96231b3b80d8
Changed files
- lib/Target/X86/X86ISelLowering.cpp
-
[llvm-cxxfilt] Split and demangle stdin input
Changed by Matt Davis - Matthew.Davisohnoyoudont@sony.com Changed at Monday, 11-Feb-19 20:30:53 UTC Repository https://llvm.googlesource.com/llvm Branch Revision 1369773f89721a848c0464386359ee76bc53dc84 Comments
[llvm-cxxfilt] Split and demangle stdin input Summary: Originally, llvm-cxxfilt would treat a line as a single mangled item to be demangled. If a mangled name appears in the middle of that string, that name would not be demangled. GNU c++filt splits and demangles every word in a string that is piped to it via stdin. Prior to this patch llvm-cxxfilt would never split strings piped to it. This patch replicates the GNU behavior and splits strings that are piped to it via stdin. This fixes PR39990 Reviewers: compnerd, jhenderson, davide Reviewed By: compnerd, jhenderson Subscribers: erik.pilkington, jhenderson, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D57350 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353743 91177308-0d34-0410-b5e6-96231b3b80d8
Changed files
- test/tools/llvm-cxxfilt/simple.test
- test/tools/llvm-cxxfilt/types.test
- tools/llvm-cxxfilt/llvm-cxxfilt.cpp
-
[globalisel] Restore comment explaining the nits of GISelChangeObserver::createdInstr()
Changed by Daniel Sanders - daniel_l_sandersohnoyoudont@apple.com Changed at Monday, 11-Feb-19 20:05:49 UTC Repository https://llvm.googlesource.com/llvm Branch Revision bae4b6720872e02e1e8045f2130c452dc7c9383f Comments
[globalisel] Restore comment explaining the nits of GISelChangeObserver::createdInstr() git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353741 91177308-0d34-0410-b5e6-96231b3b80d8
Changed files
- include/llvm/CodeGen/GlobalISel/GISelChangeObserver.h
-
[MemorySSA] Remove verifyClobberSanity.
Changed by Alina Sbirlea - asbirleaohnoyoudont@google.com Changed at Monday, 11-Feb-19 19:51:21 UTC Repository https://llvm.googlesource.com/llvm Branch Revision e15e0ec30e1491335ec277ec21ec2ce0848b2d0c Comments
[MemorySSA] Remove verifyClobberSanity. Summary: This verification may fail after certain transformations due to BasicAA's fragility. Added a small explanation and a testcase that triggers the assert in checkClobberSanity (before its removal). Addresses PR40509. Reviewers: george.burgess.iv Subscribers: sanjoy, jlebar, llvm-commits, Prazek Tags: #llvm Differential Revision: https://reviews.llvm.org/D57973 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353739 91177308-0d34-0410-b5e6-96231b3b80d8
Changed files
- include/llvm/Analysis/MemorySSA.h
- lib/Analysis/MemorySSA.cpp
- test/Analysis/MemorySSA/pr40509.ll
-
Refactor setAlreadyUnrolled() and setAlreadyVectorized().
Changed by Michael Kruse - llvmohnoyoudont@meinersbur.de Changed at Monday, 11-Feb-19 19:45:44 UTC Repository https://llvm.googlesource.com/llvm Branch Revision 0bb9e7af427e7977ffa3f8cdd51ffb5049128c71 Comments
Refactor setAlreadyUnrolled() and setAlreadyVectorized(). Loop::setAlreadyUnrolled() and LoopVectorizeHints::setLoopAlreadyUnrolled() both add loop metadata that stops the same loop from being transformed multiple times. This patch merges both implementations. In doing so we fix 3 potential issues: * setLoopAlreadyUnrolled() kept the llvm.loop.vectorize/interleave.* metadata even though it will not be used anymore. This already caused problems such as http://llvm.org/PR40546. Change the behavior to the one of setAlreadyUnrolled which deletes this loop metadata. * setAlreadyUnrolled() used to create a new LoopID by calling MDNode::get with nullptr as the first operand, then replacing it by the returned references using replaceOperandWith. It is possible that MDNode::get would instead return an existing node (due to de-duplication) that then gets modified. To avoid, use a fresh TempMDNode that does not get uniqued with anything else before replacing it with replaceOperandWith. * LoopVectorizeHints::matchesHintMetadataName() only compares the suffix of the attribute to set the new value for. That is, when called with "enable", would erase attributes such as "llvm.loop.unroll.enable", "llvm.loop.vectorize.enable" and "llvm.loop.distribute.enable" instead of the one to replace. Fortunately, function was only called with "isvectorized". Differential Revision: https://reviews.llvm.org/D57566 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353738 91177308-0d34-0410-b5e6-96231b3b80d8
Changed files
- include/llvm/Analysis/LoopInfo.h
- include/llvm/Transforms/Vectorize/LoopVectorizationLegality.h
- lib/Analysis/LoopInfo.cpp
- lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
- test/Transforms/LoopVectorize/X86/vect.omp.force.small-tc.ll
- test/Transforms/LoopVectorize/remove_metadata.ll
-
[InstCombine] Fix matchRotate bug when one operand is a ConstantExpr shift
Changed by Sanjay Patel - spatelohnoyoudont@rotateright.com Changed at Monday, 11-Feb-19 19:26:27 UTC Repository https://llvm.googlesource.com/llvm Branch Revision a054687ab1453499fb68cc77dd6c69fa23fe4f3a Comments
[InstCombine] Fix matchRotate bug when one operand is a ConstantExpr shift This bug seems to be harmless in release builds, but will cause an error in UBSAN builds or an assertion failure in debug builds. When it gets to this opcode comparison, it assumes both of the operands are BinaryOperators, but the prior m_LogicalShift will also match a ConstantExpr. The cast<BinaryOperator> will assert in a debug build, or reading an invalid value for BinaryOp from memory with ((BinaryOperator*)constantExpr)->getOpcode() will cause an error in a UBSAN build. The test I added will fail without this change in debug/UBSAN builds, but not in release. Patch by: @AndrewScheidecker (Andrew Scheidecker) Differential Revision: https://reviews.llvm.org/D58049 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353736 91177308-0d34-0410-b5e6-96231b3b80d8
Changed files
- lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
- test/Transforms/InstCombine/rotate.ll
-
[SelectionDAGBuilder] Add restrictions to EmitFuncArgumentDbgValue
Changed by Bjorn Pettersson - bjorn.a.petterssonohnoyoudont@ericsson.com Changed at Monday, 11-Feb-19 19:23:30 UTC Repository https://llvm.googlesource.com/llvm Branch Revision 30806aba1e3db2547c35508cca229e96a1a5d54e Comments
[SelectionDAGBuilder] Add restrictions to EmitFuncArgumentDbgValue Summary: This patch fixes PR40587. When a dbg.value instrinsic is emitted to the DAG by using EmitFuncArgumentDbgValue the resulting DBG_VALUE is hoisted to the beginning of the entry block. I think the idea is to be able to locate a formal argument already from the start of the function. However, EmitFuncArgumentDbgValue only checked that the value that was used to describe a variable was originating from a function parameter, not that the variable itself actually was an argument to the function. So when for example assigning a local variable "local" the value from an argument "a", the assocated DBG_VALUE instruction would be hoisted to the beginning of the function, even if the scope for "local" started somewhere else (or if "local" was mapped to other values earlier in the function). This patch adds some logic to EmitFuncArgumentDbgValue to check that the variable being described actually is an argument to the function. And that the dbg.value being lowered already is in the entry block. Otherwise we bail out, and the dbg.value will be handled as an ordinary dbg.value (not as a "FuncArgumentDbgValue"). A tricky situation is when both the variable and the value is related to function arguments, but not neccessarily the same argument. We make sure that we do not describe the same argument more than once as a "FuncArgumentDbgValue". This solution works as long as opt has injected a "first" dbg.value that corresponds to the formal argument at the function entry. Reviewers: jmorse, aprantl Subscribers: jyknight, hiraditya, fedor.sergeev, dstenb, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D57702 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353735 91177308-0d34-0410-b5e6-96231b3b80d8
Changed files
- include/llvm/CodeGen/FunctionLoweringInfo.h
- lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
- lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
- test/DebugInfo/X86/dbg-value-funcarg.ll
- test/DebugInfo/X86/dbg-value-funcarg2.ll
-
[LICM&MSSA] Limit store hoisting.
Changed by Alina Sbirlea - asbirleaohnoyoudont@google.com Changed at Monday, 11-Feb-19 19:07:15 UTC Repository https://llvm.googlesource.com/llvm Branch Revision e5935fd52f3215c61831ecda2075c197b55a85f2 Comments
[LICM&MSSA] Limit store hoisting. Summary: If there is no clobbering access for a store inside the loop, that store can only be hoisted if there are no interfearing loads. A more general verification introduced here: there are no loads that are not optimized to an access outside the loop. Addresses PR40586. Reviewers: george.burgess.iv Subscribers: sanjoy, jlebar, Prazek, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D57967 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353734 91177308-0d34-0410-b5e6-96231b3b80d8
Changed files
- include/llvm/Transforms/Utils/LoopUtils.h
- lib/Transforms/Scalar/LICM.cpp
- lib/Transforms/Scalar/LoopSink.cpp
- test/Transforms/LICM/store-hoisting.ll
-
[TargetLibraryInfo] Update run time support for Windows
Changed by Evandro Menezes - e.menezesohnoyoudont@samsung.com Changed at Monday, 11-Feb-19 19:02:28 UTC Repository https://llvm.googlesource.com/llvm Branch Revision 1fb641f9e6aa9633efc7856a0132b62d0acade85 Comments
[TargetLibraryInfo] Update run time support for Windows It seems that the run time for Windows has changed and supports more math functions than it used to, especially on AArch64, ARM, and AMD64. Fixes PR40541. Differential revision: https://reviews.llvm.org/D57625 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353733 91177308-0d34-0410-b5e6-96231b3b80d8
Changed files
- lib/Analysis/TargetLibraryInfo.cpp
- test/Transforms/InstCombine/double-float-shrink-1.ll
- test/Transforms/InstCombine/double-float-shrink-2.ll
- test/Transforms/InstCombine/pow-1.ll
- test/Transforms/InstCombine/win-math.ll
-
[AArch64][GlobalISel] Add isel support for a couple vector exts/truncs
Changed by Jessica Paquette - jpaquetteohnoyoudont@apple.com Changed at Monday, 11-Feb-19 18:56:39 UTC Repository https://llvm.googlesource.com/llvm Branch Revision 5dfbd9a2388e466147e9328bd9a5c4bda9ce61d3 Comments
[AArch64][GlobalISel] Add isel support for a couple vector exts/truncs Add support for - v4s16 <-> v4s32 - v2s64 <-> v2s32 And update tests that use them to show that we generate the correct instructions. Differential Revision: https://reviews.llvm.org/D57832 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353732 91177308-0d34-0410-b5e6-96231b3b80d8
Changed files
- lib/Target/AArch64/AArch64LegalizerInfo.cpp
- test/CodeGen/AArch64/GlobalISel/select-fp-casts.mir
- test/CodeGen/AArch64/arm64-vcvt_f.ll
-
[GlobalISel][AArch64] NFC: Remove unnecessary IR from select-fp-casts.mir
Changed by Jessica Paquette - jpaquetteohnoyoudont@apple.com Changed at Monday, 11-Feb-19 18:41:22 UTC Repository https://llvm.googlesource.com/llvm Branch Revision ca332cb943ae953f7baef1b45c249bdef862f427 Comments
[GlobalISel][AArch64] NFC: Remove unnecessary IR from select-fp-casts.mir The IR section in this test doesn't do anything, so there's no point in it being there. Since it's redundant, just remove it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353731 91177308-0d34-0410-b5e6-96231b3b80d8
Changed files
- test/CodeGen/AArch64/GlobalISel/select-fp-casts.mir
-
[DebugInfo] Fix /usr/lib/debug llvm-symbolizer lookup with relative paths
Changed by Jordan Rupprecht - rupprechtohnoyoudont@google.com Changed at Monday, 11-Feb-19 18:05:48 UTC Repository https://llvm.googlesource.com/llvm Branch Revision d3d623b47b69fd06656c2ae6c65e7f45b36759ad Comments
[DebugInfo] Fix /usr/lib/debug llvm-symbolizer lookup with relative paths Summary: rL189250 added a realpath call, and rL352916 because realpath breaks assumptions with some build systems. However, the /usr/lib/debug case has been clarified, falling back to /usr/lib/debug is currently broken if the obj passed in is a relative path. Adding a call to use absolute paths when falling back to /usr/lib/debug fixes that while still not making any realpath assumptions. This also adds a --fallback-debug-path command line flag for testing (since we probably can't write to /usr/lib/debug from buildbot environments), but was also verified manually: ``` $ rm -f path/to/dwarfdump-test.elf-x86-64 $ strace llvm-symbolizer --obj=relative/path/to/dwarfdump-test.elf-x86-64.debuglink 0x40113f |& grep dwarfdump ``` Lookups went to relative/path/to/dwarfdump-test.elf-x86-64, relative/path/to/.debug/dwarfdump-test.elf-x86-64, and then finally /usr/lib/debug/absolute/path/to/dwarfdump-test.elf-x86-64. Reviewers: dblaikie, samsonov Reviewed By: dblaikie Subscribers: krytarowski, aprantl, hiraditya, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D57916 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353730 91177308-0d34-0410-b5e6-96231b3b80d8
Changed files
- include/llvm/DebugInfo/Symbolize/Symbolize.h
- lib/DebugInfo/Symbolize/Symbolize.cpp
- test/DebugInfo/symbolize-gnu-debuglink-fallback.test
- tools/llvm-symbolizer/llvm-symbolizer.cpp
-
[MCA][Scheduler] Track resources that were found busy when issuing an instruction.
Changed by Andrea Di Biagio - Andrea_DiBiagioohnoyoudont@sn.scee.net Changed at Monday, 11-Feb-19 17:55:47 UTC Repository https://llvm.googlesource.com/llvm Branch Revision b2b9806fed69015f45bb5cecd5d5aba361a954c8 Comments
[MCA][Scheduler] Track resources that were found busy when issuing an instruction. This is a follow up of r353706. When the scheduler fails to issue a ready instruction to the underlying pipelines, it now updates a mask of 'busy resource units'. That information will be used in future to obtain the set of "problematic" resources in the case of bottlenecks caused by resource pressure. No functional change intended. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353728 91177308-0d34-0410-b5e6-96231b3b80d8
Changed files
- include/llvm/MCA/HardwareUnits/Scheduler.h
- lib/MCA/HardwareUnits/Scheduler.cpp
-
[PowerPC] Avoid scalarization of vector truncate
Changed by Roland Froese - froeseohnoyoudont@ca.ibm.com Changed at Monday, 11-Feb-19 17:29:14 UTC Repository https://llvm.googlesource.com/llvm Branch Revision 0783d48feda80d7750e9e43fd324e8e1864765cb Comments
[PowerPC] Avoid scalarization of vector truncate The PowerPC code generator currently scalarizes vector truncates that would fit in a vector register, resulting in vector extracts, scalar operations, and vector merges. This patch custom lowers a vector truncate that would fit in a register to a vector shuffle instead. Differential Revision: https://reviews.llvm.org/D56507 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353724 91177308-0d34-0410-b5e6-96231b3b80d8
Changed files
- lib/Target/PowerPC/PPCISelLowering.cpp
- lib/Target/PowerPC/PPCISelLowering.h
- test/CodeGen/PowerPC/vec-trunc.ll
-
[GlobalISel][AArch64] Select G_FFLOOR
Changed by Jessica Paquette - jpaquetteohnoyoudont@apple.com Changed at Monday, 11-Feb-19 17:22:58 UTC Repository https://llvm.googlesource.com/llvm Branch Revision baeeed43cc24472e1cbc83fb0b6ee0f70eef8e1f Comments
[GlobalISel][AArch64] Select G_FFLOOR This teaches the legalizer about G_FFLOOR, and lets us select G_FFLOOR in AArch64. It updates the existing floating point tests, and adds a select-floor.mir test. Differential Revision: https://reviews.llvm.org/D57486 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353722 91177308-0d34-0410-b5e6-96231b3b80d8
Changed files
- lib/CodeGen/GlobalISel/LegalizerHelper.cpp
- lib/Target/AArch64/AArch64LegalizerInfo.cpp
- lib/Target/AArch64/AArch64RegisterBankInfo.cpp
- test/CodeGen/AArch64/GlobalISel/select-floor.mir
- test/CodeGen/AArch64/arm64-vfloatintrinsics.ll
- test/CodeGen/AArch64/f16-instructions.ll
-
Recommit "[GlobalISel] Add IRTranslator support for G_FFLOOR"
Changed by Jessica Paquette - jpaquetteohnoyoudont@apple.com Changed at Monday, 11-Feb-19 17:16:32 UTC Repository https://llvm.googlesource.com/llvm Branch Revision f344f53426c39bf0e8d0784c541824140b38570f Comments
Recommit "[GlobalISel] Add IRTranslator support for G_FFLOOR" After the changes introduced in r353586, this instruction doesn't cause any issues for any backend. Original review: https://reviews.llvm.org/D57485 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353720 91177308-0d34-0410-b5e6-96231b3b80d8
Changed files
- lib/CodeGen/GlobalISel/IRTranslator.cpp
- test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll
-
GlobalISel: Add G_FCANONICALIZE instruction
Changed by Matt Arsenault - Matthew.Arsenaultohnoyoudont@amd.com Changed at Monday, 11-Feb-19 17:05:20 UTC Repository https://llvm.googlesource.com/llvm Branch Revision c0665d4bcd80761897a57b7041308bc22586fd90 Comments
GlobalISel: Add G_FCANONICALIZE instruction git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353719 91177308-0d34-0410-b5e6-96231b3b80d8
Changed files
- include/llvm/Support/TargetOpcodes.def
- include/llvm/Target/GenericOpcodes.td
- lib/CodeGen/GlobalISel/IRTranslator.cpp
- lib/CodeGen/GlobalISel/LegalizerHelper.cpp
- lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
- test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll
- test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
- test/CodeGen/AMDGPU/GlobalISel/legalize-fcanonicalize.mir
-
[AMDGPU] fix atomic_optimizations_buffer.ll test after DPP combiner was enabled by default.
Changed by Valery Pykhtin - Valery.Pykhtinohnoyoudont@amd.com Changed at Monday, 11-Feb-19 16:28:42 UTC Repository https://llvm.googlesource.com/llvm Branch Revision 14478b44a8101eb948f965f775b17db8f36b14fd Comments
[AMDGPU] fix atomic_optimizations_buffer.ll test after DPP combiner was enabled by default. Related commits: rL353691, rL353703. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353717 91177308-0d34-0410-b5e6-96231b3b80d8
Changed files
- test/CodeGen/AMDGPU/atomic_optimizations_buffer.ll
-
[X86] Regenerate insertelement tests
Changed by Simon Pilgrim - llvm-devohnoyoudont@redking.me.uk Changed at Monday, 11-Feb-19 16:16:09 UTC Repository https://llvm.googlesource.com/llvm Branch Revision e2953b930b569d9763ebdbc36d71fb5aef1f3303 Comments
[X86] Regenerate insertelement tests Add common X86/X64 prefixes (and use X86 instead of X32) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353716 91177308-0d34-0410-b5e6-96231b3b80d8
Changed files
- test/CodeGen/X86/insertelement-shuffle.ll
-
Add recipes for migrating downstream branches of git mirrors
Changed by David Greene - greenedohnoyoudont@obbligato.org Changed at Monday, 11-Feb-19 15:40:02 UTC Repository https://llvm.googlesource.com/llvm Branch Revision 2edc14dd19b60964e31b9d84ace5b3bcd089468f Comments
Add recipes for migrating downstream branches of git mirrors Add some common recipes for downstream users developing on top of the existing git mirrors. These instructions show how to migrate local branches to the monorepo. Differential Revision: https://reviews.llvm.org/D56550 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353713 91177308-0d34-0410-b5e6-96231b3b80d8
Changed files
- docs/Proposals/GitHubMove.rst
-
Move some classes into anonymous namespaces. NFC.
Changed by Benjamin Kramer - benny.kraohnoyoudont@googlemail.com Changed at Monday, 11-Feb-19 15:16:21 UTC Repository https://llvm.googlesource.com/llvm Branch Revision e258a8039332a3e29d3b528278adf09715a9af48 Comments
Move some classes into anonymous namespaces. NFC. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353710 91177308-0d34-0410-b5e6-96231b3b80d8
Changed files
- lib/CodeGen/SelectionDAG/DAGCombiner.cpp
- lib/DebugInfo/CodeView/CodeViewError.cpp
- lib/DebugInfo/MSF/MSFError.cpp
- lib/DebugInfo/PDB/GenericError.cpp
- lib/DebugInfo/PDB/Native/RawError.cpp
- lib/Target/AArch64/AArch64InstructionSelector.cpp
- lib/Target/WebAssembly/WebAssemblyFixFunctionBitcasts.cpp
-
[MCA] Return a mask of busy resources from method ResourceManager::checkAvailability(). NFCI
Changed by Andrea Di Biagio - Andrea_DiBiagioohnoyoudont@sn.scee.net Changed at Monday, 11-Feb-19 14:53:04 UTC Repository https://llvm.googlesource.com/llvm Branch Revision 00bde103cd412e5f1856709542f5e81049245231 Comments
[MCA] Return a mask of busy resources from method ResourceManager::checkAvailability(). NFCI In case of bottlenecks caused by pipeline pressure, we want to be able to correctly report the set of problematic pipelines. This is a first step towards adding support for bottleneck hints in llvm-mca (see PR37494). No functional change intended. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353706 91177308-0d34-0410-b5e6-96231b3b80d8
Changed files
- include/llvm/MCA/HardwareUnits/ResourceManager.h
- include/llvm/MCA/HardwareUnits/Scheduler.h
- lib/MCA/HardwareUnits/ResourceManager.cpp
- lib/MCA/HardwareUnits/Scheduler.cpp
-
[AMDGPU] Remove unused variable
Changed by Benjamin Kramer - benny.kraohnoyoudont@googlemail.com Changed at Monday, 11-Feb-19 14:49:54 UTC Repository https://llvm.googlesource.com/llvm Branch Revision b9408bae2012bb87083595b94138219a67cecc94 Comments
[AMDGPU] Remove unused variable git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353704 91177308-0d34-0410-b5e6-96231b3b80d8
Changed files
- lib/Target/AMDGPU/AMDGPUAtomicOptimizer.cpp
-
[AMDGPU] Fix DPP sequence in atomic optimizer.
Changed by Neil Henning - neil.henningohnoyoudont@amd.com Changed at Monday, 11-Feb-19 14:44:14 UTC Repository https://llvm.googlesource.com/llvm Branch Revision 4fee3cff4d923744aa87dd87175a8b6f91deb4a0 Comments
[AMDGPU] Fix DPP sequence in atomic optimizer. This commit fixes the DPP sequence in the atomic optimizer (which was previously missing the row_shr:3 step), and works around a read_register exec bug by using a ballot instead. Differential Revision: https://reviews.llvm.org/D57737 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353703 91177308-0d34-0410-b5e6-96231b3b80d8
Changed files
- lib/Target/AMDGPU/AMDGPUAtomicOptimizer.cpp
- test/CodeGen/AMDGPU/atomic_optimizations_buffer.ll
- test/CodeGen/AMDGPU/atomic_optimizations_global_pointer.ll
- test/CodeGen/AMDGPU/atomic_optimizations_local_pointer.ll
- test/CodeGen/AMDGPU/atomic_optimizations_pixelshader.ll
- test/CodeGen/AMDGPU/atomic_optimizations_raw_buffer.ll
- test/CodeGen/AMDGPU/atomic_optimizations_struct_buffer.ll
-
Revert "[X86][SSE] Generalize X86ISD::BLENDI support to more value types"
Changed by Sam McCall - sam.mccallohnoyoudont@gmail.com Changed at Monday, 11-Feb-19 14:05:36 UTC Repository https://llvm.googlesource.com/llvm Branch Revision 45caba411d27a8f2d42e7471b67fe25d0e1dd464 Comments
Revert "[X86][SSE] Generalize X86ISD::BLENDI support to more value types" This reverts commit r353610. It causes a miscompile visible in macro expansion in a bootstrapped clang. http://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-20190211/626590.html git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353699 91177308-0d34-0410-b5e6-96231b3b80d8
Changed files
- lib/Target/X86/X86ISelLowering.cpp
- lib/Target/X86/X86InstrSSE.td
- test/CodeGen/X86/avx512-shuffles/partial_permute.ll
- test/CodeGen/X86/combine-sdiv.ll
- test/CodeGen/X86/insertelement-ones.ll
- test/CodeGen/X86/known-signbits-vector.ll
- test/CodeGen/X86/masked_load.ll
- test/CodeGen/X86/masked_store.ll
- test/CodeGen/X86/oddshuffles.ll
- test/CodeGen/X86/packss.ll
- test/CodeGen/X86/pr34592.ll
- test/CodeGen/X86/prefer-avx256-mask-shuffle.ll
- test/CodeGen/X86/sse2.ll
- test/CodeGen/X86/vector-reduce-smax.ll
- test/CodeGen/X86/vector-reduce-smin.ll
- test/CodeGen/X86/vector-shift-ashr-256.ll
- test/CodeGen/X86/vector-shuffle-128-v8.ll
- test/CodeGen/X86/vector-shuffle-256-v16.ll
- test/CodeGen/X86/vector-shuffle-256-v32.ll